阻止和非阻塞分配Verilog

时间:2014-07-25 03:22:08

标签: verilog

我在always块中有以下代码,包含阻塞(代码1)和非阻塞(代码2)。

但两种情况下的输出都不同。为什么呢?

事件队列我知道,但可能我无法理解“always @(clk)”语句将放在事件队列中的哪个位置。

// Code 1
module osc2 (clk, d);
    output clk;
    reg clk;
    input d;
    initial 
        begin
            #10 clk = 0;
            $monitor ("%d %b", $time, clk);
        end
    initial #100 $finish;       
    always @ (clk) #10 clk = ~clk;
endmodule

// Output of Code 1
10 0
20 1

// Code 2
module osc2 (clk, d);
    output clk;
    reg clk;
    input d;
    initial 
        begin
            #10 clk = 0;
            $monitor ("%d %b", $time, clk);
        end
    initial #100 $finish;       
    always @ (clk) #10 clk <= ~clk; 
endmodule

// Output of Code 2
10 0
20 1
30 0 (goes on upto 90)
90 0

1 个答案:

答案 0 :(得分:1)

出于解释的目的,我揭开了前两个循环的内容并扩展了组件以便分解。下面的代码将模拟。

<强> always @ (clk) #10 clk = ~clk;

initial while (1) // to see the loop, functionally equivalent to 'always' 
  begin           // procedural block
    begin : loop0_unraveled
      @(clk);       // suspend continuation of loop until change in clk
      #10;          // suspend continuation of loop 10 time units
      clk = ~clk;   /* eval '~clk' now
                     * update clk now
                     */
    end
    begin : loop1_unraveled
      begin // this block is functionally equivalent to '@(clk)'
        reg smpl_clk;      // local variable
        smpl_clk = clk;    // sample 
        $display("%t::Pre-Suspend  : smpl_clk=%b clk=%b", $time, smpl_clk, clk);
        wait(clk != smpl_clk); // suspend continuation of loop until
             /*  1. no other blocking statements can execute, go to next region
              *  2. All other regions are empty
              *  3. Remaining events are block
              *  4. Nothing left to do, exit simulation
              */
        $display("%t::Post-Suspend : smpl_clk=%b clk=%b", $time, smpl_clk, clk);
      end
      #10;           // unreachable
      clk = ~clk;
    end
end

<强> always @ (clk) #10 clk <= ~clk;

initial while (1) // to see the loop, functionally equivalent to 'always' 
  begin           // procedural block
    begin : loop0_unraveled       
      @(clk);       // suspend continuation of loop until change in clk
      #10;          // suspend continuation of loop 10 time units
      clk <= ~clk;  /* eval '~clk' now,
                     * update clk after all blocking statements are suspended
                     */
    end
    begin : loop1_unraveled
      begin         // this block is functionally equivalent to '@(clk)'
        reg smpl_clk;      // local variable
        smpl_clk = clk;    // sample 
        $display("%t::Pre-Suspend  : smpl_clk=%b clk=%b",$time, smpl_clk, clk);
        wait(clk != smpl_clk); // suspend continuation of loop until true
             /*  1. no other blocking statements can execute, go to next region
              *  2. In NBA region update clk
              *  3. Go back to active region
              *  4. Eval true, continue
              */
        $display("%t::Post-Suspend : smpl_clk=%b clk=%b", $time, smpl_clk, clk);
      end
      #10;           // reached
      clk <= ~clk;
    end
end                  // Go to top of the loop

正如我已经提到的here,自触发块在实践中并不常见。时钟发生器通常植入类似于:

initial begin
  #10 clk = 0;
  forever #10 clk = ~clk;
end

或者

always #10 clk = (clk===1'b0);