How does the program counter know where the next instruction is in memory?

Question

I've always been told that it increments by 4 to fetch the next instruction (when there are no jumps or such things), but does this mean that instructions are limited to having 3 arguments?

Am I right in thinking the program looks like this in memory:

0: LOAD
1: eax
2: 0x30
3: <zeroed out because the next instruction has to be at 4>
4: LOAD
5: ebx
6: 0x34
7: <zeroed out because the next instruction has to be at 8>
8: ADD
9: ecx
10: eax
11: ebx
12: <Next instruction>

Etc.

This may not be exactly valid assembly but you get my point (I also know it would be in binary). If the program is not loaded like this in memory, then how does the program counter know where the next instruction is?

Answer 1

The answer to your question is system dependent. There are generally two answers:

First, in most RISC systems, one of the things that is simplified is that all instructions inclusive of operands take up a single static size. This makes it very simple for the program counter or instruction pointer to be incremented by a static amount. This sounds like what you are referring to in your question.

In CISC systems and RISC systems that do not use static sizes, part of the work that the instruction decoder does is determine how large the instruction is, how many arguments there are and how large they are. With that information, the instruction pointer can be properly increased.