如何实现Clash readNew亚稳定解决方法?

时间:2018-11-16 04:04:40

标签: clash

如何正确使用readNew

一个带有两个模块的最小示例,该模块仅读取和写入asyncRam

TopLevel.hs

module TopLevel where

import Clash.Prelude
import LowerLevel

topEntity 
  :: Clock System Source
  -> Reset System Asynchronous
  -> Signal System (Unsigned 5)
  -> Signal System (Maybe (Unsigned 5, BitVector 5))
  -> Signal System (BitVector 5)
topEntity = exposeClockReset topLevel

topLevel :: HiddenClockReset dom gated sync
         => Signal dom (Unsigned 5)
         -> Signal dom (Maybe (Unsigned 5, BitVector 5))
         -> Signal dom (BitVector 5)
topLevel rdAddr wrM = lowerLevel rdAddr wrM

LowerLevel.hs

module LowerLevel where

import Clash.Prelude

lowerLevel :: HiddenClockReset dom gated sync
           => Signal dom (Unsigned 5)
           -> Signal dom (Maybe (Unsigned 5, BitVector 5))
           -> Signal dom (BitVector 5)
lowerLevel rdAddr wrM = readNew (asyncRam d32) rdAddr wrM

当前,当我编译这段代码时,我会收到亚稳警告(尽管成功了):

Compiling: TopLevel.topEntity LowerLevel.$sreadNew20998 (::
GHC.Classes.IP   rst   (Clash.Signal.Internal.Reset
     (Clash.Signal.Internal.Dom system 10000)
     Clash.Signal.Internal.Asynchronous)
-> GHC.Classes.IP
     clk
     (Clash.Signal.Internal.Clock
        (Clash.Signal.Internal.Dom system 10000)
        Clash.Signal.Internal.Source)
-> Clash.Signal.Internal.Clock
     (Clash.Signal.Internal.Dom system 10000)
     Clash.Signal.Internal.Source
-> Clash.Signal.Internal.Signal
     (Clash.Signal.Internal.Dom system 10000)
     (Clash.Sized.Internal.Unsigned.Unsigned 5)
-> Clash.Signal.Internal.Signal
     (Clash.Signal.Internal.Dom system 10000)
     (GHC.Base.Maybe
        (GHC.Tuple.(,)
           (Clash.Sized.Internal.Unsigned.Unsigned 5)
           (Clash.Sized.Internal.BitVector.BitVector 5)))
-> Clash.Sized.Internal.BitVector.BitVector 5) has potentially dangerous meta-stability issues:

The following clocks:
* GHC.Classes.IP   clk   (Clash.Signal.Internal.Clock
     (Clash.Signal.Internal.Dom system 10000)
     Clash.Signal.Internal.Source)
* Clash.Signal.Internal.Clock   (Clash.Signal.Internal.Dom system 10000)   Clash.Signal.Internal.Source belong to the same clock domain
and should be connected to the same clock source in order to prevent
meta-stability issues.

我进行了一些研究,发现了这个Google小组answer。我很确定这是应该做什么,但是我不确定如何实现

如帖子中所述,我如何内联asyncRam clk d32?我如何获得“免费的旧货”?我正在尝试使用readNew中的Clash.Explicit.Prelude(但没有成功),但是我不明白为什么我不能只使用Prelude版本。我认为可能需要exposeClockReset,但是从我的阅读看来,似乎有两个来自同一域的时钟被用来规避亚稳警告?请澄清,谢谢!

更新:这是已知的issue。有人告诉我暂时不要考虑编译器警告。

0 个答案:

没有答案