暂停/重启序列

时间:2019-05-17 11:36:54

标签: system-verilog uvm

我的设计需要暂停数据流量才能进入低功耗模式。有没有一种方法可以暂停流量生成顺序或驱动程序以允许这种情况发生?然后再恢复该顺序?

我目前在设置的顺序中有一个标志,告诉它打破永久循环。但是,这并不理想,因为序列已完成,然后我必须重新启动它。

1 个答案:

答案 0 :(得分:0)

您可以从虚拟序列中锁定(或获取音序器),例如:

class virtual_seq extends uvm_sequence;

  `uvm_object_utils(virtual_zero_seq)
  `uvm_declare_p_sequencer(virtual_sequencer)

  function new(string name = "");
    super.new(name);
  endfunction: new

  task body;
    // start the normal traffic sequence
    normal_traffic_seq seq;
    seq = serial_fixed_seq::type_id::create("seq");
    if (! seq.randomize() ...
    seq.set_starting_phase(get_starting_phase());
    seq.start(p_sequencer.seqr, this);

    // when you're ready, lock the sequencer
    #12345;
    this.lock(p_sequencer.seqr);   // or grab

    // wait till you're ready to resume
    #12345; 
    // you could start another sequence on the same sequencer if you need to
    // if you do, you must input the reference to this virtual sequence in 
    // the sequence's start method, otherwise that sequence will be locked too
    // eg
    // power_down_seq.start(p_sequencer.seqr, this);
    //                                        ^^^^

    // when you're ready, start normal traffic again
    this.unlock(p_sequencer.seqr);   // or ungrab
  endtask : body

endclass : virtual_zero_seq

抢夺是更高优先级的锁。如果多个虚拟序列尝试锁定定序器,则它们将以请求顺序的顺序获得访问权限。如果有多个虚拟序列尝试获取一个音序器,如果它已被锁定(或获取),则这些虚拟序列将以先到先得的方式访问它。

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