VHDL如果语句语法错误

时间:2013-01-25 14:29:38

标签: syntax syntax-error vhdl

我有以下代码:

process(value_counter, hex5_value)
    begin
        if(value_counter <= x"0F") then
            with value_counter select hex4 <=  --error on this line
            "0111111" when x"00", 
            "0000110" when x"01", 
            "1011011" when x"02", 
            "1001111" when x"03", 
            "1100110" when x"04", 
            "1101101" when x"05", 
            "1111101" when x"06", 
            "0000111" when x"07", 
            "1111111" when x"08", 
            "1101111" when x"09",
            "1110111" when x"0A", 
            "1111100" when x"0B",
            "0111001" when x"0C", 
            "1011110" when x"0D",
            "1111001" when x"0E", 
            "1110001" when x"0F";

            hex5<="0111111";
        elsif(value_counter > x"0F") then
            with value_counter mod 10 select hex4 <=
            "0111111" when x"00", 
            "0000110" when x"01", 
            "1011011" when x"02", 
            "1001111" when x"03", 
            "1100110" when x"04", 
            "1101101" when x"05", 
            "1111101" when x"06", 
            "0000111" when x"07", 
            "1111111" when x"08", 
            "1101111" when x"09",
            "1110111" when x"0A", 
            "1111100" when x"0B",
            "0111001" when x"0C", 
            "1011110" when x"0D",
            "1111001" when x"0E", 
            "1110001" when x"0F";

            with hex5_value select hex5 <=
            "0111111" when x"00", 
            "0000110" when x"01", 
            "1011011" when x"02", 
            "1001111" when x"03",
            "1100110" when x"04", 
            "1101101" when x"05", 
            "1111101" when x"06", 
            "0000111" when x"07", 
            "1111111" when x"08", 
            "1101111" when x"09",
            "1110111" when x"0A", 
            "1111100" when x"0B",
            "0111001" when x"0C", 
            "1011110" when x"0D",
            "1111001" when x"0E", 
            "1110001" when x"0F";
        end if;
end process;

但运行时我在指示的行上收到以下错误:Error (10500): VHDL syntax error at xxx near text "with"; expecting "end", or "(", or an identifier ("with" is a reserved keyword), or a sequential statement。任何人都知道造成这种情况的原因,以及我如何合法地等同地重写它?

2 个答案:

答案 0 :(得分:2)

&#34;正确&#34;答案是一个过程中的CASE声明或者&#34; with ... select&#34;在组合区域(即在过程之外)。

但如果您创建了一个包含16个7段显示值的常量数组,并且只是将数组编入索引,那么您将拥有更好的VHDL:

subtype seven_seg is std_logic_vector(6 downto 0);

constant decode : array 0 to 15 of seven_seg := (
            "0111111", "0000110", "1011011", "1001111", 
            "1100110", "1101101", "1111101", "0000111", 
            "1111111", "1101111", "1110111", "1111100",
            "0111001", "1011110", "1111001", "1110001");

    process(value_counter, hex5_value)
        begin
            if value_counter <= x"0F" then
                hex4 <= decode(to_integer(value_counter(3 downto 0)));
                hex5 <= decode(0);
            -- elsif value_counter > x"0F" then  
            -- surely this "elsif" is unnecessary!
            else 
                hex4 <= decode(to_integer(value_counter(7 downto 4)));
                hex5 <= decode(to_integer(hex5_value(3 downto 0)));
            end if;
    end process;

答案 1 :(得分:0)

带'with'的信号赋值是并发语句。所以它在进程中无效。 '案例'可以做到。但是当案件变得很安静时,请检查时序分析的结果。

有关更多语法信息,请参阅this link