VHDL:检测按键PS / 2键盘(FPGA)

时间:2019-07-05 17:22:27

标签: keyboard vhdl fpga ps2

我试图检测何时使用VHDL在PS / 2键盘上按下按钮。问题是要获得一个好的解决方案,即在拥有正确的PS / 2键盘的Make代码的同时,按下该信号。

我尝试过:

  • 检查PS / 2时钟何时恒定为高电平。
  • 检查移位寄存器是否保持不变。
  • 用更大的移位寄存器检测通行代码。

;

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity Keyboard_Drive is 
    Port  ( PS2_DAT, PS2_CLK, clk, rstn : in std_logic;
end entity; 


architecture rtl of Keyboard_Drive is 
    signal PS2_CLK2, PS2_CLK2_old, PS2_DAT2, detected_fall : std_logic;
    signal shiftreg: std_logic_vector (9 downto 0);
    signal pressed: std_logic := '0';
begin 

input_signals : process (clk) begin 
    if rising_edge (clk) then 
        -- get data
        PS2_DAT2 <= PS2_DAT;
        PS2_CLK2 <= PS2_CLK;
        PS2_CLK2_old <= PS2_CLK2;
    end if;
end process;

detected_fall <= (NOT PS2_CLK2) AND PS2_CLK2_old;

Key: process (clk, rstn) begin 
    if rstn = '0' then 
        shiftreg <= (others => '0');
    elsif rising_edge (clk) then
        -- assign shift
        if detected_fall = '1' then
            shiftreg (8 downto 0)   <= shiftreg (9 downto 1);
            shiftreg (9)            <= PS2_DAT2;
        end if;
    end if;
end process;

0 个答案:

没有答案